Microwave Circuit Chapter Accessed 8000 Times

Intech Open Access Book on Microwave Circuits

Microwave Circuits Book Chapter on High-speed SiGe and CMOS Buffering
This May 2014 LNAFIN CEO Tiiliharju got this pleasant email from the Intech Open Access publisher:

We are pleased to inform you that your paper “Complementary High-Speed SiGe and CMOS Buffers” has achieved impressive readership results. The chapter you have published with InTech in the book “Advanced Microwave Circuits and Systems” has so far been accessed 8000 times. Congratulations on the significant
impact that your work has achieved to date.

The top downloads of your paper are from the following five countries:
United States of America
United Kingdom

The Book Chapter can be found here.

The link gives free access to the chapter. BibTeX reference .bib file can be downloaded here. The chapter discusses different high-speed buffering implementations including CEO’s personal IC implementations in both complementary Sige and nanometer CMOS. Other than our CEO’s chapter, the book has chapters from different microwave circuit experts worldwide. For example the chapter on s-parameter techniques from the Linköping University might be a good reference. The chapter is titled “Mixed-Mode S-Parameters and Conversion Techniques.”

484-lead Xilinx Spartan6 FPGA PCB Routing

FPGA PCB routing for a 484-lead Xilinx Spartan6 Design

No special vias needed for this tiny BGA-484 PCBThe picture shows TOP view of a 10-layer (10L) Spartan6 board recently routed at LNAFIN.

The printed circuit board (PCB) has the FPGA chip with 484 BGA-balls, memory in a 144-ball VBGA package, a separate TCP-communication IC, an RJ-45 jack,
etc. plus customer ASIC circuit (144-leads) on the backside.


Economical yet High-performance PCB Routing Solution

The design has one intact ground layer, and two inner ground layers with only a couple of tracks each. Good, solid grounding is a must-have to ensure properly functioning finished circuitry. Three ground layers strucks a perfect balance between cost vs. performance for this design.

Tiny PCB Area Challenge

The PCB area specs was 4.8 x 6.2 cm (1.90×2.45 inch).

Despite the tiny acrage, the most expensive PCB technologies such as buried or blind or laser vias were avoided. All vias were set to use a 0.2mm drill (THT). Minimum track widths and track separations were also kept above 0.1mm (4 mils). With this setup, the design was successfully fit into a total of 10-layers. Thus customer saved a lot of money in PCB fabrication cost. LNAFIN electronics-PCB supplies the low-cost boards to customer together with laser stencil for solder paste application. Assembly service is being discussed with the client.

Picture and all data has been published with customer consent (LNAFIN never publishes project data without customer permission).

WWW-pages for LNAFIN Electronics and PCB Products

To increase awareness of our electronics and printed circuit board products in Finland, we decided to set up a Finnish version of our web-pages. At the same time the idea was born to start a blog. This is the result of those thoughts, and we call it the Tekno! blog. At the same time, this replaces our Facebook and Google pages as the company news media. These social site pages plus our Twitter account will be refreshed via wordpress plugins.


First Patent in 2010

First patent was granted in 2010. LNAFIN CEO, Doct.Tech. (EE), Esa Tiiliharju received his first patent in November 2010. Patent title is “Feedback network for cascaded amplifiers”, and its details can be found here. At this time, the idea of setting up LNAFIN began to mature through discussions with Peter Virta and collegues.